The 32×32 InGaAs single-photon avalanche diode array chip integrates the InP/InGaAs SPAD array with a dedicated readout integrated circuit (ROIC) through the flip-chip bonding process. The spacing between photosensitive pixels is 100 micrometers. Meanwhile, each pixel is integrated with a microlens to improve the effective duty cycle of the photosensitive surface. This chip needs to work under refrigeration and should be hermetically packaged with multi-stage TEC refrigeration. It is used together with the supporting drive circuit and signal-reading software to meet the application requirements of low-light imaging, lidar and so on. The instruction manual for the ROIC will be provided separately.
Main Technical Parameters
Technical parameters | Sign | Test condition | Min. | Typical | Max. | Unit |
Chip pixel specifications |
|
| 32 × 32 |
|
Chip pixel pitch |
|
| 100 | μm |
Photosensitive surface diameter (microlens) | Φa |
| 90 | 95 | 98 | μm |
Response wavelength range | Δλ |
| 950 | - | 1650 | nm |
Detector DC breakdown voltage | [VBR] | IR =10μA, PIN =0, 22±2℃ | 50 | 70 | 90 | V |
Detector pixel DC dark current | ID | VR =VBR-2V, PIN =0, 22±2℃ | - | 1 | 10 | nA |
Breakdown voltage temperature coefficient | η | IR =10μA, PIN =0, -40~25℃ | - | 0.10 | 0.15 | V/℃ |
Time resolution | dT | Using 250MHz clock |
| 0.5 |
| ns |
Time range | Tbin |
| dT*212 | ns |
Frame rate | FR |
|
|
| 100 | kHz |
Single - photon detection efficiency | Average value | PDE | T =-20℃, Vex =3V, wavelength 1550nm short-pulse |
| 20% |
|
|
| Standard deviation | σPDE |
|
| 6% | 8% |
|
Dark count rate | Average value | DCR | T =-20℃, no incident light ，Vex adjust to PDE=20% |
| 15 | 30 | kHz |
| Standard deviation | σDCR |
|
| 6 | 12 | kHz |
Time jitter | TJ | T =-20℃, PDE=20% |
| 500 |
| ps |
Cumulative crosstalk probability | XT | T =-20℃, PDE=20% |
| 20% |
|
|
Effective pixel rate | Nop | PDE and DCR are in the range of ±3σ | 96% | 99% | 100% |
|
The detector DC breakdown voltage and dark current refer to the average breakdown voltage and dark current of each pixel during DC testing of InP/InGaAs SPAD. The overbias voltage Vex needs to be adjusted according to the operating temperature and single-photon detection sensitivity. The value of Vex is the DC bias voltage of ROIC at the operating temperature minus the average DC breakdown voltage of pixels. To avoid the DC leakage current at pixels with low breakdown voltage exceeding the circuit damage threshold, do not set Vex above 3.5V.
Chip Pad Layout
The detail of PIN definition is in the ROIC instruction manual
32×32 InGaAs Single-Photon Avalanche Diode Array Chip.pdf
