The laser diode with a period grating provides a high side-mode suppression ratio (SMS) over a wide temperature range. In order to achieve the high bias injection efficiency and low leakage current,waveguide stripe is applied for current confinement. The waveguide stripes, including multiple quantum wells (MQWs) active layers and period grating for low threshold current, high slope efficiency and high temperature characteristic (TO) design.
The laser diode with alignment mask and broad-area metal pad on the p-side is designed for p-side down mounting process. The continue-wave DC characteristic over wide temperature range of laser chips have been verified and validated repeatedly.
Name | Model | Description | Parameter | Price |
---|
Small Far-Field Beam:
● Vertical and horizontal far field angle are 20 degree in typical.
Lower Power Consumption:
● The typical power consumption for 50 mW output power under 75deg
● operation temperature is below 350 mW.
High Optical Power at High Temperature:
● Up to 50 mW optical output power under 250 mA bias and 75°C operation.
Electrical/Optical Characteristics (Tsub=25°C, CW bias unless stated otherwise)
Parameter | Symbol | Min | Typ | Max | Unit |
Centre Wavelength | λ | 1306 | 1310 | 1316 | nm |
Side Mode Suppression Ratio | SMSR | 35 | 45 | dB | |
Threshold Current | Ith | 20 | 40 | mA | |
Operating Current | Iop | 230 | 250 | mA | |
Chip output Power | Pf | 50 | 70 | mW | |
Quantum Efficiency | η | 0.2 | 0.3 | mW/mA | |
Current Tuning Coefficient | ∆λ/∆I | 0.015 | nm/mA | ||
Temperature Tuning Coefficient | ∆λ/∆T | 0.12 | nm/K | ||
Forward Voltage | Vf | 1.3 | 2 | V | |
Kink deviation | KINK | 30% | |||
Beam divergence angle (parallel) | ϑ// | 19 | Deg | ||
Beam Divergence angle (perpendicular) | ϑ⊥ | 17 | Deg | ||
Resistance | Rs | 8 | ohm | ||
Linewidth width | △λ | 3 | MHZ |
Symbol | Parameter | Test Conditions | Min. | Typ. | Max. | Unit |
Im | Threshold Current | CW,T=25°C | 20 | 40 | mA | |
Po | Output Power | CW,lth+20mA, T=25°C | 4 | 6 | mW | |
CW, Ith + 200 mA, T=25 °C, TEC controlled. | 50 | 80 | ||||
SE | Slope Efficiency | CW, Ith + 20 mA, T=25 °C | 0.2 | 0.3 | W/A | |
Vop | Operating Voltage | CW, Ith + 20 mA | 1.2 | 1.5 | V | |
CW, Ith + 200 mA, TEC controlled | 2.5 | 3.5 | ||||
△υ | Linewidth | CW, Ith + 200 mA, TEC controlled | 3 | 10 | MHz | |
RIN | Relative Intensity Noise | CW, Ith + 200 mA, TEC controlled, @1GHz | -150 | -145 | dB/Hz | |
λc | Center Wavelength | CW, Ith + 20 mA | 1306 | 1310 | 1316 | nm |
SMSR | Side Mode Suppression Ration | CW, Ith + 20 mA | 35 | 40 | dB | |
ϑ// | Beam Divergence Angle (parallel) | CW, Ith + 20 mA | 19 | Deg. | ||
ϑ丄 | Beam Divergence Angle (perpendicular) | CW, Ith + 20 mA | 17 | Deg. |
Handling Procedures
1. Suggested bonding condition
● Bonding temperature: 350℃
● Bonding force: 30 grams (not exceed 40 grams)
● Bonding force and temperature should be applied in a gradual fashion
● Bonding time: <= 10 seconds
2. Suggested burn-in conditions
Conditions 1:
● Chip heatsink temperature: 100℃
● Current: 100mA
● Time: 24 hours
● Pass Criteria: BI 0hrs LIV1;BI 24hrs LIV2 Compare LIV2 to LIV1
● Delta Ith (T=25℃) ≤1mA and Delta Pf(T=25℃) ≤10%
Conditions 2:
● Chip heatsink temperature: 100℃
● Current: 100mA
● Time: 24 hours+48hrs
● Pass Criteria: BI 24hrs LIV1;BI 24hrs+48hrs LIV2 Compare LIV2 to LIV1
● Delta Ith (T=25℃) ≤0.7mA and Delta Pf(T=25℃) ≤5%
Outline Drawing
Unit (μm)
Absolute maximum ratings
Item | Unit | Min | Typ | Max |
Case Temperature | ℃ | -5 | 25 | 70 |
Chip Temperature | ℃ | +10 | 25 | 50 |
Operating Current | mA | 0 | 400 | 500 |
Forward Voltage | V | 0.8 | 1.2 | 2.0 |
Suggest TEC Current | A | - | - | 1.2 |
Reverse Voltage(LD) | V | - | - | 2.0 |
Reverse Voltage(PD) | V | - | - | 20 |
Note:
1.Stresses which exceed the absolute maximum ratings can cause permanent damage to the device.
2.These are only absolute stress ratings . Functional operation of the device is not implied at conditions exceeding those given in the operational sections of the data sheet.
3.Exposure to absolute maximum ratings for extended periods can affect device reliability adversely
● Telecommunication
● Data Communication
● Storage area network
● MAN
● PON
TDLAS-DFB Chips-☆-A8▽-W□□□□
☆: Output Power
A: 50mW
B: 100mW
▽: Wavelength Tolerance
1: ±1nm
2: ±2nm
□□□□: Wavelength
1306: 1306nm
*****
1316: 1316nm