The LP-PD4x5032 is a high-performance 850-910nm 56Gbaud 1x4 Array PIN Photodiode (PD) chip designed by LD-PD PTE.LTD.. Engineered for next-generation optical communications, this array is optimized for high-speed data transmission in PAM4 applications.
| Name | Model | Description | Parameter | Price |
|---|
● Bandwidth up to 34GHz/channel
● Anti-reflective for 850-910nm
● 250um diode pitch
● φ32um active area
● Low capacitance
● GSG Electrode Structure
Parameter | Symbol | Min | Tpye | Max | Unit | Test conditionns |
Response range | λ | 840 | 850 | 910 | nm | |
Responsivity | R | 0.55 | A/W | λ=850nm | ||
0.65 | A/W | λ=910nm | ||||
Dark current | ID | 0.3 | 1.0 | nA | VR=-5V | |
Capacitance | C | 0.12 | 0.15 | pF | VR=-2V, f= 1MHz | |
Bandwidth | Bw | 34.0 | GHz | VR=-2V 3dB down, RL=50Ω |
Note: (Tc=25℃, Single Die)
Absolute Maximum Ratings
Parameter | Symbol | Value | Unit |
Reverse voltage | VRmax | 20 | V |
Operating temperature | Topr | -40 to +85 | ℃ |
Storage temperature | Tstg | -55 to +125 | ℃ |
Dimensions Diagram ( µm)

Dimension Parameter
Parameter | Symbol | Value | Unit |
Active area diameter | D | 32 | µm |
Bond pad size | - | 60 x 70 | µm |
Die size | - | 1000 x 250 | µm |
Diode pitch | - | 250 | um |
Die thickness | t | 150 ± 10% | µm |
Precautions for use
This chip is susceptible to damage as a result of ESD. Use of ground straps, antistatic mats, and other standard ESD protective equipment is requisite when handling or testing an InGaAs or GaAs PIN/APD chip.
● 400Gbps PAM4
● 200Gbps SFP+
● 4x100Gb ps QSFP