The device is a compound Si-PIN structure. To reach high response, back side hole etching process is used for thinner I layer, when carrier go through the floating area, optical current will appear .Slow optical carrieIP are shorted for fast response purpose.We has our Patented package Desgin-“Bullet” design adopts Two optimized chips special for different wavelength.

Tsub=25°C, CW bias unless stated otherwise

Circle chip

Note: Saturated optic power ≤0.3w/cm2

Square chip

Note: Saturated optic power ≤0.3w/cm2

Typical characteristical curve 

Responsivity, R (A/W)

 Circle chip Wavelength, λ (nm)

 Responsivity, R (A/W)

Square chip Wavelength, λ (nm)

Capacitance vs voltage Curve

capacitance

                                                                                                                                                                                                   Voltage（V）

Application electric circuit